1. Field of the Invention
The described invention relates generally to the field of image sensing and recording. More particularly, it relates to an image sensor that outputs data in a sectional raster form.
2. Prior Art
FIG. 1 is an illustration of a popular method for capturing images used in a video camera. The light from light source 2 reflects from person 10 onto lens 12 where it is focused on image sensing integrated circuit 14. With the help of control circuitry 16, image sensing integrated circuit 14 produces a series of voltages that correspond to the light levels experienced at various evenly distributed locations, called pixels, located across image sensing integrated circuit 14. Formatting circuitry 18 converts these voltage levels into a standard, readily recordable and transmittable signal and provides this signal to either tape 20 or another system through output 22. The format of this signal usually corresponds to the National Television Standards Committee ("NTSC") transmission signal standard or the VHS video recording standard.
FIG. 2 is an illustration of the interlaced raster scan output pattern defined by the NTSC transmission standard. In order to create an image on a video tube, an electron beam is scanned across the display surface of the video tube in a manner that reproduces the light levels created by the original image on the surface of the video tube. The NTSC standard calls for 525 lines to be traced 30 times each second in two interlaced sets of 262.5 lines. The first 21 lines of each set of 262.5 lines are blanked to allow for the transmission of the vertical scanning synchronization signal as well as other information signals. Reference numeral 201 indicates the start of the first visible line of the first set of 262.5 lines at the top left hand corner of the screen. The solid lines indicate the path traced out by the first set of 262.5 lines, the end of which is indicated by reference numeral 202. Once this first scan is completed, the second scan begins at a point indicated by reference numeral 203, at the center of the top of the screen. The dotted lines indicate the second set of 262.5 lines traced out in an interlaced fashion to the first set of 262.5 lines. The result is a flicker free image of 483 visible lines of picture information that is updated 30 times per second.
FIG. 3 is an illustration of image sensing integrated circuit 14 from FIG. 1. Light sensitive diodes 300 are placed at the input gates 302 of charge-coupled device ("CCD") arrays 304. As the light is focused through lens 12 onto image sensing integrated circuit 14, the voltage created by light sensitive diodes 300 generate charge stores in the substrate of integrated circuit 14. By the proper application of gating signals on control inputs 320, these charge stores are transferred into CCD arrays 304 in parallel fashion by input gates 302. Once in CCD array 304, the charge stores are shifted up serially with the top row of charge stores being transferred in parallel fashion through gates 308 into CCD array 310. The charge stores in CCD array 310 are then shifted to the right serially through gate 312 into output amplifier 314 which generates voltages in proportion to the charge stores. Another row of charge stores are then shifted up from CCD arrays 304 and once again shifted out until all the charge stores from CCD arrays 304 are removed and the generation of an image is complete.
By providing the charge stores this row by row fashion, the voltage levels provided by the charge stores are easily converted into a conventional raster scan NTSC transmission signal. To provide interlacing, the odd numbered ones of gates 302 are first activated, with the resulting charge stores being passed to CCD array 310, and then the even numbered ones of gates 302 are activated with the resulting charge stores being similarly passed to CCD array 310 for outputting. While only a single light sensitive diode 300 is shown at each pixel location, various implementations can incorporate multiple diodes which correspond to a single pixel location. Generally, the greater the number of diodes, the better the quality of the image produced. Additionally, multiple diodes that are sensitive to different frequencies of light can be incorporated for the production of color images.
The image sensing integrated circuit 14 shown in FIG. 3 is configured to output a set of voltage levels in a manner that can easily be converted to NTSC signal that provides two interlaced scan patterns. In the past, this configuration was desirable because the NTSC standard is the most widely used to broadcast images in the U.S. More recently, however, it has become desirable to store and transmit images in digital format where each pixel of information is represented by a number of bits. The use of a digital format allows images to be compressed so that they may be transmitted over standard telephone lines or other wire media. Additionally, digital images can be manipulated by computers and other digital processing devices that provide enhanced flexibility and control over past methods for image manipulation.
Common to many of these data compression and manipulation techniques is the division of a single frame of image data into subsections to which the various signal processing algorithms are applied. Because an image is processed in these subsections, manipulation of the image cannot begin until at least one subsection of the image becomes available to a microprocessor or other image manipulation circuit. Since the prior art image sensing circuit provides the image in a line by line fashion, much additional information must be provided and stored before a properly shaped subsection can be constructed. This storage delays image processing and requires image manipulation systems to have storage circuitry. In order to better pipeline this image processing, and reduce the amount of storage circuitry required in an image generation system, an image sensing integrated circuit that provides data in subsections is desirable.